Japan is seeking to reassert itself at the technological frontier with Rapidus, a government-backed effort to mass-produce 2-nanometer chips by 2027, betting that speed and supply-chain dominance can offset decades of lost ground in advanced logic manufacturing.

In the world of semiconductors it's common to think of Taiwan Semiconductor Manufacturing Company (TSMC) as the dominant force. The pre-eminent national champion accounts for 60% of global chip revenues and more than 90% of the world’s most advanced chips. But those are just the headlines. Scratch the surface and it quickly becomes clear that none of those chips can be made without a raft of Japanese technology.

“Today, Japan holds a 50%+ global share in semiconductor materials. For specific high-end segments like EUV photoresists, that share is near 100%. You cannot print a chip at TSMC without Shin-Etsu Chemical. You cannot coat a wafer without Tokyo Electron. You cannot cut a silicon ingot without Disco Corporation. Japan has an oligopolistic grip on these key areas,” says James Riney, CEO of Coral Capital, a Japanese VC fund.

For years, Japan’s role in chips has been framed as decline. It was synonymous with electronics in the 1980s but has since fallen out of the limelight – at first glance.

“Japan lost the semiconductor war thirty years ago, so they say. The narrative repeated in boardrooms from Silicon Valley to Shenzhen goes like this: In the 1980s, Japan was the ‘industrial superpower’ that terrified Washington. By the 2000s, it had missed the digital era, crushed by the Plaza Accord and its own corporate sclerosis, while South Korea and Taiwan ate its lunch. Japan became ‘Galapagos’: isolated, weird, and irrelevant. The prevailing wisdom suggests that the sun set on Japanese tech dominance when the bubble burst in 1991, leaving behind a museum of hardware giants slowly rusting into obsolescence,” says Riney.

Based on the northern island, the “Alaska of Japan,” Rapidus aims to challenge that view. “Hokkaido is the new Taiwan, thanks to a new project underway called ‘Rapidus.’ It is the only location on the map that offers the water, the power, the talent, the culture, and the political stability to serve as the redundant node for the Western world’s computing infrastructure,” says Riney.

The consortium’s strategy diverges from TSMC’s high-volume model. Rapidus is building a ‘Short TAT (Turnaround Time)’ foundry. Their target is to cut that 120-day cycle to 50 days, or even 15 days for ‘hot lots’.”

“How? By using single-wafer processing instead of batch processing. But Rapidus is the Japanese government’s moon shot. Currently the smallest chip Japan produces is a 40 nanometre chip and it wants to go from there to 2 nanometres – even the smallest US chips are 4 nanometres and the 7 nanometres are the smallest widely used in commercial applications like smart phones.

“To be sure, the hurdles remain immense. Jumping from 40-nanometer legacy nodes to 2-nanometer frontier tech is akin to learning to fly by piloting a rocket, and the graveyard of state-backed tech consortia is vast,” says Riney.

TSMC’s advantage is economies of scale. It makes hundreds of thousands of chips for customers like Apple, but it has long lead times and uses a batch production process that can take 120 days from order to delivery.

In a batch process, you put 25 wafers in a boat and process them together. It’s efficient, but if you have a defect, you lose the whole batch. Rapidus uses a single-wafer process that treats every wafer individually. It’s slower for massive volume, but it allows for incredibly fast feedback loops and customization. You get data from every single wafer, instantly.” The company is betting that in the modern era of AI and fast moving start ups that the game has changed and there is a market for bespoke chips with more specific specifications who want their chips quickly.

The approach is pitched at emerging artificial intelligence chip designers seeking rapid iteration rather than scale. “The future belongs to companies like Tenstorrent (which has already partnered with Rapidus) who need specialized chips, fast. They don’t need 100mn units. They need fast iteration.”

Rapidus has chosen Chitose in Hokkaido for its proposed cluster, branded the “Hokkaido Valley” vision. “Hokkaido is the ‘Alaska of Japan.’ It is awash in fresh, clean water. The Chitose River provides an abundant industrial water source that is chemically ideal for cleaning wafers. In a world of water scarcity, Hokkaido offers a security premium that Taiwan cannot match.”

The region also offers excellent renewable energy capacity and the prospect of nuclear baseload power from the currently shuttered Tomari NPP, alongside proximity to Sapporo and its airport. Located about 1,500 miles from tensions in the Taiwan Strait, Chitose sits on geologically stable ground with a relatively low risk of major earthquakes compared with Tokyo or Kyushu, a factor critical for atomic-level precision in 2-nanometer manufacturing.

“The cost of failure for Japan is merely financial, while the cost of inaction for the global order is existential. In an era where “efficiency” has been replaced by “resilience” as the primary virtue of supply chains, the Rapidus project is not just a commercial gamble; it is a geopolitical insurance policy. The West doesn’t just need a faster chip; it needs a safer one, and the market is finally pricing in the premium of political stability,” said Riner.